Re: Injector Control Options
Posted: Tue Jan 11, 2011 12:08 pm
My gut feel is that 100ma sensing would be enough, this feed back is really to ensure your current is correct-ish, not as an active feed back right? Such that if you drop to low, you know you need to need to increase your PWM slightly. So you can technically set your 100ma at the low side, then after you dial something in to the range, you really don't need it's feedback unless something changes.
Also if a PSoC is used (or op-amp conditional), you can add some analog signal conditioning before the A/D, so you can scale that 8 bits to just the current range you're looking at. Such that 8 bits can range from .5 amps to 1.5 amps.
I just found this datasheet about active clamping from IRF. I'm still quite ignorant about terms "active clamping" or "bi-level snubbing" To me it looks like an OV protected drive is an active clamp, and is a different term than "bi-level snubbing". So this diode may be a redundant or an alternative snubbing approach. I'm not quite sure what to think about it. Right now, I don't see a benefit of that circuit. Perhaps it's additional benefit is that it allows you to use a larger variety of FET's, not sure. Should we pick a drive chip and design around that, or should we pick a series of drive silicon and use that. I'm tempted to say pick a OV MOSFET and design around that.
http://www.irf.com/technical-info/designtp/dt99-4.pdf
I'd like to learn more about the features you gain by using both techniques, so I can better comment about that feature.
Also if a PSoC is used (or op-amp conditional), you can add some analog signal conditioning before the A/D, so you can scale that 8 bits to just the current range you're looking at. Such that 8 bits can range from .5 amps to 1.5 amps.
I just found this datasheet about active clamping from IRF. I'm still quite ignorant about terms "active clamping" or "bi-level snubbing" To me it looks like an OV protected drive is an active clamp, and is a different term than "bi-level snubbing". So this diode may be a redundant or an alternative snubbing approach. I'm not quite sure what to think about it. Right now, I don't see a benefit of that circuit. Perhaps it's additional benefit is that it allows you to use a larger variety of FET's, not sure. Should we pick a drive chip and design around that, or should we pick a series of drive silicon and use that. I'm tempted to say pick a OV MOSFET and design around that.
http://www.irf.com/technical-info/designtp/dt99-4.pdf
I'd like to learn more about the features you gain by using both techniques, so I can better comment about that feature.