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I just checked the entire code base over looking for issue 499 only to find that the max9924 circuit on my PumaS1 introduces a constant 0.11ms of delay into the input, and thus the output, if you sample the input before the MAX chips...

I'm wondering if this is normal or if there is a problem with the Puma and if there is any way to reduce it to near zero. If not we'll have to add a hardware latency setting into the code soon. I was planning to eventually anyway, but I don't like the idea of needing that much of one by default.

I guess we'd really need three:

• Input latency
• Injector output latency
• Ignition output latency

All should be margin-of-error small, but right now the first one is fairly big for me.

Fred.

Here are the results of my testing with the 1nF capacitor between the input resistors and without the capacitor.

Hey Andy (or Fred),

Fred stated in his software diary thread that issue 499 is now fixed.
Do the files you attached (which I don't know how to read) show that the delay was caused by the value of cap? Thanks, Huff

It seems to have an effect. I wonder if using a stiffer input resistor would be wise too. maybe 1k + no cap. Hard to say. This testing is far from complete.

Last night I chatted with DeuceEFI about this issue. On the Max9926 part, the 1nF cap across the inputs pins can be removed. The 9926 will operate just fine.

The other possibility is to feed the Hall Effect signal into the negative input pins (IN1- and IN2-), and let IN1+ and IN2+ float. Also no capacitor. In this configuration the output signal is inverted.

MotoFab wrote:Last night I chatted with DeuceEFI about this issue. On the Max9926 part, the 1nF cap across the inputs pins can be removed. The 9926 will operate just fine.

Actually, this is not true. Andy showed a reduction to around 40% latency over the stock configuration which is still WAY too much.

The other possibility is to feed the Hall Effect signal into the negative input pins (IN1- and IN2-), and let IN1+ and IN2+ float. Also no capacitor. In this configuration the output signal is inverted.

This seems entirely pointless, and would render the output signal incompatible.

What may work is holding the negative line at 2.5V, though.

Hi Fred,
Can you detail your experimental setup a bit?

I am curious as to the details in determining how the 110us delay measurement was derived.
Does the Fredstim generate two, out of phase bi-polar signals with the 0V point being the time reference for your measurement?

Maybe you could also use the "Hall" configuration (0 - 5V square wave on + input and floating - input) to confirm latency.

Thanks,
Huff

Huff, the fredstim is a straight 0-5V "hall" signal, and at the time, I had a floating -ve lead and the cap installed. Andy tried without the cap and halved my latency. I came across it while testing firmware and thought i had a code/math issue. I checked and double checked every single line of code before clicking, realising, and checking the hw. I've not done any experiments or checks, however I may do some "any day now" as I have the required equipment to do that.

Bump :-)

Bump!

Can I do anything to help here?