I did this to allow for cross-connect wires to jump over traces for my prototype board, the first one will be single sided until I can perfect the exposure time for the resist coating.Fred wrote:Why are there jumpers on the IAT/CHT sensors?

I have corrected this as it was driving me crazy trying to position the components on the boardFred wrote:BRV circuit is still visually reversed left/right mirror image of the other circuits, this is purely a cosmetic complaint.

I used the jumper JP1 to get over a trace on the PCB layout, it will be a cross over wire.Fred wrote:I'm unsure if your jumper setup will work on the max99 chip, but you don't need to be that complicated. What you need are two more connector pins. For VR you want to bring in two wires, one for each side, as a differential input. For hall you just leave the -ve one disconnected. As pointed out by someone else in another thread, calling it ground is technically wrong. Configure it in A2 mode and run the extra two traces to the connector and call it good. If this still isn't clear, feel free to discuss first. Do you have skype? If so, we can have a chat about it.
I also cleaned up my wiring mistake on the CRANK- and CAM- inputs that I originally had connected to ground. CRANK- and CAM- will be jumpered to GND for Hall/Opto/Digital input whereas jumper JP2 will be connected to ground only for VR inputs.
In my design you can run EITHER BOTH Hall/Opto/Digital RPM inputs OR BOTH VR inputs, but not one of each.
I haven't used skype before since my rural DSL is on the slow side (768k download / 128k upload on a PERFECT day), but I will get it setup so we can chat

Thanks, I even found what I did to be confusing on that one, when I cleaned it up it made a huge difference and pointed out some other issues that you found later on in your postFred wrote:CPU Sheet: Wow, what an improvement!
Done, good call for clarityFred wrote:Config resistors are correct, but you should chuck MODA and MODB on the CPU symbol labels. Might be clearer to do it like this too "PE7 / XCLKS" with the pin number first and function second.

Ok, so C1 (VDD1) and C5 (VDD2) should be 10uF 10v tantalum capacitors and C2 (VDDX), C3 (VDDR1), C4 (VSSA), C8 (VSSPLL) and C44 (VRH) 0.22uF should be X7R ceramic capacitors?Fred wrote:Are you planning tants on the cpu power pins? just 2 of them can benefit from it. The 0.22uF are still needed and are correct for the others. 10uF 10v would be a good choice if you do that. VDDR1 and VDDR2 are the pins for that, check the datasheet to confirm that I'm right.
Good catch!Fred wrote:Right now, your CPU would melt. VDD1 and VDD2 should be just connected to an external cap, they are internal 2.5V refs. Check the data sheet to confirm that I got the pins right. This is what you get for copying Puma...

I corrected C4 by connecting it to VDD at pin 83 (VDDA) as shown in the Motorola data sheet. Also added C44 0.22uF between VRH and VRL as it was missing from my schematic.Fred wrote:Your config for the CPU sheet should be similar/same as RavAGE with the only difference being C11 and C12 from ravage not applicable (144 pin package pins only).
You caught me, I haven't gotten to that yet, but I will...Fred wrote:There is no connector sheet.
I'm still learning KiCAD, and will update the drawings accordinglyFred wrote:Are there ground symbols/bus types in kicad? I find it hard to read the grounds/powers they way they are now being the same as the other connections. If they're available maybe you should consider using them. You might get some DRC checking as a bonus for that?

Thanks for all the helpFred wrote:Great progressSeems like your bad etch was a good thing

Yeah, the first bad etch allowed me to experiment with the exposure time, which it looks like 6 minutes is the magic time for the presensitized PCBs (3"x5"x1/16" [75 x 125 mm] single sided P/N: 603, 6"x6"x1/16" [150 x 150 mm] double sided P/N: 650) from MG Chemicals (mgchemicals.com).
I have found that my optimum traces are 0.0100" wide with 0.0060" clearance for the traces to the SMD components and 0.0250" wide with 0.0090" clearance for the injector traces. My home etching doesn't allow for plated thru holes or vias which is part of the reason for the jumpers other than the one on the MAX9926 chip for VR/Hall selection.
Once I prove out the prototype of this design, I will see about having some professional boards made...
Andy